Packet based network devices receive electronic messages or streams as sequences of packets. A packet is a formatted block of data carried by a computer network. Data from packets may be aligned arbitrarily when stored in memory causing fractions of cache memory lines to be written at packet boundaries. These fractions can cause expensive Read-Modify-Write (RMW) cycles to read the data, modify it, and then write the data back to memory. Further, write combining buffers may store these fractions and combine them with cache line fractions provided by subsequent packets from the same stream or message.
However, packets of a stream or message may be interleaved with packets from other streams or messages, separating accesses that could be write-combined, and thus reducing the probability of write-combining due to premature eviction of fractions from the write-combining buffer. Also, other store traffic, e.g., stores from a local processor, may use the write combining buffers, separating write-combinable accesses even further.
Therefore, a need exists for a method and/or apparatus to reduce interleaving packets of a stream or message and reduce separating write-combinable accesses. Moreover, it would be desirable for a method and/or apparatus to reduce the amount of Read-Modify-Write cycles caused by the alignment of packet boundaries when storing data in memory.